View ICM7228CIBI_8996678.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

fn3160 rev 9.00 page 1 of 19 august 19, 2015 fn3160 rev 9.00 august 19, 2015 icm7228 8-digit, microprocessor-compatibl e, led display decoder driver datasheet the intersil icm7228 display driver interfaces microprocessors to an 8-digit, 7-segment, numeric led display. included on chip are two types of 7-segment decoder, multiplex scan circuitry, led display segment drivers, led display digit dr ivers and an 8-byte static memory as display ram. data can be written to the icm7228a and icm7228b?s display ram in sequential 8-digit update or in single-digit update format. data is written to the icm7228c display ram in parallel random access format. the icm7228a and icm7228c drive common anode displays. the icm7228b drives common cathode displays. all versions can display the ram data as either hexadecimal or code b format. the icm7228a and icm7228b incorporate a no decode mode allowing each bit of each digit's ram word to drive individual display segments resulting in independent control of all display segments. as a result, bargraph and other irregular display segments and formats can be driven directly by this chip. the intersil icm7228 is an alternative to both the maxim icm7218 and the intersil icm7218 display drivers. notice that the icm7228a/b has an additional single digit access mode. this could make the intersil icm7218a/b software incompatible with icm7228a/b operation. features ? pb-free plus anneal available (rohs compliant) ? improved 2nd source to maxim icm7218 ? fast write access time of 200ns ? multiple microprocessor compatible versions ? hexadecimal, code b and no decode modes ? individual segment control with ?no decode? feature ? digit and segment drivers on-chip ? non-overlapping digits drive ? common anode and common cathode led versions ? low power cmos architecture ? single 5v supply applications ? instrumentation ? test equipment ? hand held instruments ? bargraph displays ? numeric and non-numeric panel displays ? high and low temperature environments where lcd display integrity is compromised
icm7228 fn3160 rev 9.00 page 2 of 19 august 19, 2015 ordering information part number part marking data entry protocol display type temp. range (c) package pkg. dwg. # icm7228aibi (no longer available, recommended replacement: icm7228aibiz) icm7228aibi sequential common anode -40 to 85 28 ld soic m28.3 icm7228aibiz (note) 7228aibiz sequential common anode -40 to 85 28 ld soic (pb-free) m28.3 icm7228aipi (no longer available, recommended replacement: icm7228aipiz) icm7228aipi sequential common anode -40 to 85 28 ld pdip e28.6 icm7228aipiz (note) icm7228aipi sequential commo n anode -40 to 85 28 ld pdip* (pb-free) e28.6 icm7228bibi (no longer available, recommended replacement: icm7228bibiz) icm7228bibi sequential common cathode -40 to 85 28 ld solc m28.3 icm7228bibiz (note) icm 7228bibiz sequential common cathode -40 to 85 28 ld solc (pb-free) m28.3 icm7228bipi (no longer available, recommended replacement: icm7228bipiz) icm7228bipi sequential common cathode -40 to 85 28 ld pdip e28.6 icm7228bipiz (note) icm 7228bipiz sequential common cathode -40 to 85 28 ld pdip (pb-free) e28.6 ICM7228CIBI (no longer available, recommended replacement: ICM7228CIBIz) ICM7228CIBI random common anode -40 to 85 28 ld solc m28.3 ICM7228CIBIz (note) icm7228ci biz random common anode -40 to 85 28 ld solc (pb-free) m28.3 icm7228cipi (no longer available, recommended replacement: icm7228cipiz) icm7228cipi random common anode -40 to 85 28 ld pdip e28.6 icm7228cipiz (note) icm7228ci pi random common anode -40 to 85 28 ld pdip (pb-free) e28.6 *pb-free pdips can be used for through hole wave solder processing only. they are not intended for use in reflow solder process ing applications. note: intersil pb-free plus anneal products employ special pb-fr ee material sets; molding compo unds/die attach materials and 10 0% matte tin plate termination finish, which are rohs compliant and compatib le with both snpb and pb-free soldering operations. intersil pb -free products are msl classified at pb-free peak ref low temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020.
icm7228 fn3160 rev 9.00 page 3 of 19 august 19, 2015 pinouts icm7228a (pdip, soic) common anode top view icm7228b (pdip, soic) common cathode top view icm7228c (pdip, soic) common anode top view seg c seg e seg b dp id6 (hexa/code b ) id5 (decode ) id7 (data coming) write mode id4 (shutdown ) id1 id0 id2 id3 v ss seg g seg d seg f digit 3 digit 7 v dd digit 8 digit 5 digit 2 digit 1 seg a digit 6 digit 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 digit 4 digit 6 digit 3 digit 1 id6 (hexa/code b ) id5 (decode ) id7 (data coming) write mode id4 (shutdown ) id1 id0 id2 id3 v ss digit 5 digit 2 digit 8 seg g seg e v dd seg d seg b seg a dp digit 7 seg f seg c 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 seg c seg e seg b dp da0 (digit address 0) da1 (digit address 1) id7 (input dp ) write hexa/code b/shutdown da2 (digit address 2) id1 id0 id2 id3 v ss seg g seg d seg f digit 3 digit 7 v dd digit 8 digit 5 digit 2 digit 1 seg a digit 6 digit 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14
icm7228 fn3160 rev 9.00 page 4 of 19 august 19, 2015 functional block diagram 8 segment drivers 8 digit drivers decode no-decode 8-byte static ram hexadecimal/ code b decoder multiplex oscillator write address counter control logic read address, digit multiplexer icm7228a, icm7228b id0 - id7 input data id4 - id7 control inputs mode write shutdown hexa/code b decode interdigit blanking decimal point 8 8 4 1 1 1 1 4 7 7 7 8 8 8 1 1 3 1 8 1 7 1 8 segment drivers 8 digit drivers 8-byte static ram hexadecimal/ code b decoder multiplex oscillator write address counter three level input logic read address multiplexer icm7228c write shutdown interdigit blanking decimal point 1 5 1 1 4 7 8 8 8 5 1 8 1 1 da0 - da2 3 digit address id0 - id3 id7 data input hexadecimal/ code b/ shutdown
icm7228 fn3160 rev 9.00 page 5 of 19 august 19, 2015 absolute maximum ratings thermal information supply voltage (v dd - v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6v digit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ma segment output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ma input voltage (note 1) (any terminal) . . (v ss -0.3v) icm7228 fn3160 rev 9.00 page 6 of 19 august 19, 2015 input leakage current, i il all inputs except pin 9, icm7228c, v in = v ss --1--1 ? a all inputs except pin 9, icm7228c, v in = 5.0v - - -1 - - -1 display scan rate, f mux per digit - 390 - - 390 - hz inter-digit blanking time, t idb 210 - 2 - - ? s logical ?1? input voltage, v inh three level input: pin 9 icm7228c, hexadecimal v dd = 5v 4.2 - - 4.2 - - v floating input, v inf three level input: pin 9 icm7228c, code b, v dd = 5v 2.0 - 3.0 2.0 - 3.0 v logical ?0? input voltage, v inl three level input: pin 9 icm7228c, shutdown, v dd = 5v --0.8--0.8v three level input impedance, z in v cc = 5v, pin 9 of icm7228c 50 - - 50 - - k ? logical ?1? input voltage, v ih all inputs except, pin 9 of icm7228c, v dd = 5v 2.0 - - 2.0 - - v logical ?0? input voltage, v il all inputs except, pin 9 of icm7228c, v dd = 5v --0.8--0.8v switching specifications v dd = +5.0v ? 10%, v ss = 0v, v il = +0.4v, v ih = +2.4v write pulsewidth (low), t wl 200 100 - 250 - - ns write pulsewidth (high), t wh 850 540 - 1200 - - ns mode hold time, t mh icm7228a, icm7228b 0 -65 - 0 - - ns mode setup time, t ms icm7228a, icm7228b 250 150 - 250 - - ns data setup time, t ds 250 160 - 250 - - ns data hold time, t dh 0 -60 - 0 - - ns digit address setup time, t as icm7228c 250 110 - 250 - - ns digit address hold time, t ah icm7228c 0 -60 - 0 - - ns electrical specifications v dd = +5.0v 10%, v ss = 0v, unless otherwise specified (continued) parameter test conditions t a = 25 o c-40 o c to 85 o c units min typ max min typ max
icm7228 fn3160 rev 9.00 page 7 of 19 august 19, 2015 timing diagrams figure 1. icm7228a/b write cycle figure 2. icm7228a/b sequential 8-digit ram update figure 3. icm7228c write cycle figure 4. display digits multiplex (common anode display) t ms t wl t ds t mh mode input valid data t dh t wh write decode/no decode? id5 (d8) (d1) mode control word type of decoder?id6 decode/no decode? id5 shutdown?id4 data coming id7 control word type of decoder?id6 shutdown? id4 data coming id7 dont care write data 8 pulses write valid data valid t wl t wh t as t ah t dh t ds data write digit address dao-daz interdigit blanking internal signal typical digits output pulses 10 ? s (typ) free running 320 ? s (typ) free running (per digit) interdigit blanking d2 d5 d1 d7 d8 d6 d4 d3
icm7228 fn3160 rev 9.00 page 8 of 19 august 19, 2015 typical performance curves figure 5. common anode digit driver i dig vs (v dd - v dig ) figure 6. common anode segment driver i seg vs v seg figure 7. common cathode digit driver i dig vs v dig figure 8. common cathode segment driver i seg vs (v dd - v seg ) table 1. icm7228a pin assignments and descriptions pin no. name function description 1 seg c output led display segments c, e, b and decimal point drive lines. 2 seg e 3 seg b 4dp 5id6, (hexa/code b ) input when ?mode? low: display data input, bit 7. when ?mode? high: control bit, decoding schem e selection: high, hexadecimal decoding; low, code b decoding. 6id5, (decode ) input when ?mode? low: display data input, bit 6. when ?mode? high: control bit, decode/no dec ode selection: high, no decode; low, decode. 7id7, (data coming) input when ?mode? low: display data input, bit 8, decimal point data. when ?mode? high: control bit, sequential data update select: high, data coming; low, no data coming. 8write input data input will be written to control r egister or display ram on rising edge of write. v dd -v dig (v) i dig (ma) 0 100 200 300 400 500 0 1.0 2.0 3.0 4.0 5.0 -55 o c 25 o c 125 o c -55 o c 25 o c 125 o c v seg (v) i seg (ma) 80 60 40 20 0 0 1.0 2.0 3.0 4.0 5.0 -55 o c 25 o c 125 o c v dig (v) i dig (ma) 300 200 100 0 01.02.03.04.05.0 -55 o c 25 o c 125 o c v dd -v seg (v) 0 10 20 30 40 50 0 1.0 2.0 3.0 4.0 5.0 i seg (ma) -55 o c 25 o c 125 o c
icm7228 fn3160 rev 9.00 page 9 of 19 august 19, 2015 9 mode input selects data to be loaded to control register or display ram: high, loads control register; low, loads display ram. 10 id4, (shutdown ) input when ?mode? low: display data input, bit 5. when ?mode? high: control bit, low power m ode select: high, normal operation; low, oscillator and display disabled. 11 id1 input when ?mode? low: display data input, bit 2. when ?mode? high and ?id7 (data coming)? low : digit address, bit 2, single digit update mode. 12 id0 input when ?mode? low: display data input, bit 1. when ?mode? high and ?id7 (data coming)? low : digit address, lsb, single digit update mode. 13 id2 input when ?mode? low: display data input, bit 3. when ?mode? high and ?id7 (data coming)? low : digit address, msb, single digit update mode. 14 id3 input when ?mode? low: display data input, bit 4. when ?mode? high: ram bank select (decode mo des only): high, ram bank a; low, ram bank b 15 digit 1 output led display digits 1, 2, 5 and 8 drive lines. 16 dlglt 2 17 digit 5 18 dlglt 8 19 v dd supply device positive power supply rail. 20 digit 4 output led display digits 4, 7, 6 and 3 drive lines. 21 dlglt 7 22 dlglt 6 23 diglt 3 24 seg f output led display segments f, d, g and a drive lines. 25 seg d 26 seg g 27 seg a 28 v ss supply device ground or n egative power supply rail. table 2. icm7228b pin assignments and descriptions pin no. name function description 1 digit 4 output led display digits 4, 6, 3 and 1 drive lines. 2 dlglt 6 3 digit 3 4 dlglt 1 5id6, (hexa/code b ) input when ?mode? low: display data input, bit 7. when ?mode? high: control bit, decoding scheme selection: high, hexadecimal decoding; low, code b decoding. 6id5, (decode ) input when ?mode? low: display data input, bit 6. when ?mode? high: control bit, decode/no dec ode selection: high, no decode; low, decode. 7id7, (data coming) input when ?mode? low: display data input, bit 8, decimal point data. when ?mode? high: control bit, sequential data update select: high, data coming; low, no data coming. table 1. icm7228a pin assignments and descriptions (continued) pin no. name function description
icm7228 fn3160 rev 9.00 page 10 of 19 august 19, 2015 8write input data input will be written to control r egister or display ram on rising edge of write. 9 mode input selects data to be loaded to control register or display ram: high, loads control register; low, loads display ram. 10 id4, (shutdown ) input when ?mode? low: display data input, bit 5. when ?mode? high: control bit, low power m ode select: high, normal operation; low, oscillator and display disabled. 11 id1 input when ?mode? low: display data input, bit 2. when ?mode? high and ?id7 (data coming)? low : digit address, bit 2, single digit update mode. 12 id0 input when ?mode? low: display data input, bit 1. when ?mode? high and ?id7 (data coming)? low : digit address, lsb, single digit update mode. 13 id2 input when ?mode? low: display data input, bit 3. when ?mode? high and ?id7 (data coming)? low : digit address, msb, single digit update mode. 14 id3 input when ?mode? low: display data input, bit 4. when ?mode? high: ram bank select (decode mo des only): high, ram bank a; low, ram bank b. 15 dp output led display decimal point and segments a, b, and d drive lines 16 seg a 17 seg b 18 seg d 19 v dd supply device positive power supply rail. 20 seg c output led display segments c, e, f and g drive lines. 21 seg e 22 seg f 23 seg g 24 digit 8 output led display digits 8, 2, 5 and 7 drive lines. 25 digit 2 26 digit 5 27 digit 7 28 v ss supply device ground or n egative power supply rail. table 3. icm7228c pin assignments and descriptions pin no. name function description 1 seg c output led display segments c, e, band decimal point drive lines. 2 seg e 3 seg b 4dp 5 da0 input digit address input, bit 1 lsb. 6 da1 input digit address input, bit 2. 7id7, (input dp ) input display decimal point data input, negative true. 8write input data input will be written to display ram on rising edge of write . table 2. icm7228b pin assignments and descriptions (continued) pin no. name function description
icm7228 fn3160 rev 9.00 page 11 of 19 august 19, 2015 detailed description system interfacing and data entry modes, icm7228a and icm7228b the icm7228a/b devices are compatible with the architectures of most microprocessor systems. their fast switching characteristics makes it possible to access them as a memory mapped i/o device with no wait state necessary in most microcontroller systems. all the icm7228a/b inputs, including mode, feature a 250ns minimum setup and 0ns hold time with a 200ns minimum write pulse. input logic levels are ttl and cmos compatible. figure 9 shows a generic method of driving the icm7228a/b from a microprocessor bus. to the microprocessor, each device appears to be 2 separate i/o locations; the control register and the display ram. selection between the two is accomplished by the mode input driven by address line a0. input data is placed on the ld0 - ld7 lines. the write input acts as both a device select and write cycle timing pulse. see figure 1 and switching specifications table for write cycle timing parameters. the icm7228a/b have three data entry modes: control register update without ram update, sequential 8-digit update and single digit update. in all three modes a control word is first written by pulsing the write input while the mode input is high, thereby latching data into the control register. the logic level of individual bits in the control register select shutdown, decode/no decode, hex/code b, ram bank a/b and display ram digit address as shown in tables 1 and 2. the icm7228a/b display ram is divided into 2 banks, called bank a and b. when using the hexadecimal or code b display modes, these ram banks can be selected separately. this allows two separate sets of display data to be stored and displayed alternately. notice that the ram bank selection is not possible in no-decode mode, this is because the display data in the no- decode mode has 8 bits, but in decoded schemes (hex/code b) is only 4 bits (ld0 - ld3 data). it should also be mentioned that the decimal point is independent of selected bank, a turned on decimal point will remain on for either bank. selection of the ram banks is controlled by ld3 input. the ld3 logic level (during control register update) selects which bank of the internal ram to be written to and/or displayed. control register update without ram update the control register can be updat ed without changing the display data by a single pulse on the write input, with mode high and data coming low. if the display is being decoded (hex/code b), then the value of ld3 dete rmines which ram bank will be selected and displayed for all eight digits. sequential 8-digit update 9 hexa/code b/shutdown input three level input. display function control: high, hexadecimal decoding; float, code b decoding; low, oscillator, and display disabled. 10 da2 input digit address input, bit 3, msb. 11 id1 input display data inputs. 12 id0 13 id2 14 id3 15 digit 1 output led display digits 1, 2, 5 and 8 drive lines. 16 dlglt 2 17 digit 5 18 dlglt 8 19 v dd supply device positive power supply rail. 20 digit 4 output led display digits 4, 7, 6 and 3 drive lines. 21 dlglt 7 22 dlglt 6 23 diglt 3 24 seg f output led display segments f, d, g and a drive lines. 25 seg d 26 seg g 27 seg a 28 v ss supply device ground or n egative power supply rail. table 3. icm7228c pin assignments and descriptions (continued) pin no. name function description
icm7228 fn3160 rev 9.00 page 12 of 19 august 19, 2015 the logic state of da ta coming (ld7) is also latched during a control register update. if the latched value of data coming (ld7) is high, the display becomes blanked and a sequential 8-digit update is initia ted. display data can now be written into ram with 8 successive write pulses, starting with digit 1 and ending with digit 8 (see figure 2). after all 8 ram locations have been written to, the display turns on again and the new data is displayed. additional write pulses are ignored until a new control register u pdate is performed. all 8 digits are displayed in the format (hex/code b or no decode) specified by the control word that preceded the 8 digit update. if a decoding scheme (hex/code b) is to be used, the value of ld3 during the control word update determines which ram bank will be written to. single digit update in this mode each digit data in the display ram can be updated individually without changing the other display data. first, with mode input high, a control word is written to the control register carrying the following information; data coming (ld7) low, the desired display format data on ld 4 - ld6, the ram bank selected by ld3 (if decoding is selected) and the address of the digit to be updated on data lines ld0 - ld2 (s ee table 4). a second write to the icm7228a/b, this time with mode input low, transfers the data at the ld0 - ld7 inputs into the selected digit?s ram location. in single digit update mode, each individual digit?s data can be specified independently for being displayed in decoded or no- decode mode. for those digits which decoding scheme (hex/code b) is selected, only one can be effective at a time. whenever a control word is written, the specified decoding scheme will be applied to all those digits which selected to be displayed in decoded mode. system interfacing, icm7228c the icm7228c is directly compatible with the architecture of most microprocessor systems. its fast switching characteristics make it possible to access them as a memory mapped i/o device with no wait state necessary in most microcontroller systems. all the icm7228c inputs, excluding hexa/code b/shutdown, feature a 250ns minimum setup and 0ns hold time with a 200ns minimum write pulse. input logic levels are ttl and cmos compatible. figure 10 shows a generic method of driving the icm7228c from a microprocessor bus. to the microprocessor, the 8 bytes of the display ram appear to be 8 separate i/o locations. loading the icm7228c is quite similar to a standard memory write cycle. the address of the digit to be updated is placed on lines da0 - da2, the data to be written is placed on lines id0 - ld3 and id7, then a low pulse on write input will transfer the data in . see figure 3 and switching characteristics table for write cycle timing parameters. the icm7228c does not have any control register, and also does not provide the no decode display format. hexadecimal or code b character selection and shutdown mode are directly controlled through the three level input at pin 9, which is accordingly called hexa/code b/shutdown . see table 3 for input and output definitions of the icm7228c. display formats the icm7228a and icm7228b have three possible display formats; hexadecimal, code b and no decode. table 5 shows the character sets for the decode modes and their corresponding input code. i/o or memory write pulse decoder enable address decoder id0 id7 intersil icm7228a/b segments drive write mode digits drive a0 device select and write pulse led display address bus a0 - a15 a1-a15 data bus d0-d7 d0 - d7 microprocessor system figure 9. icm7228a/b microprocessor system interfacing table 4. digits address, icm7228a/b input data lines selected digit 1d2 ld2 ld0 0 0 0 dlglt 1 0 0 1 dlglt 2 0 1 0 diglt 3 0 1 1 dlglt 4 1 0 0 digit 5 1 0 1 dlglt 6 1 1 0 dlglt 7 1 1 1 dlglt 8
icm7228 fn3160 rev 9.00 page 13 of 19 august 19, 2015 the display formats of the icm7228a/b are selected by writing data to bits id4, id5 and id6 of the control register (see table 1 and 2 for input definitions). hexadecimal and code b data is entered via id0-ld3 and id7 controls the decimal point. the no decode mode of the icm7228a and icm7228b allows the direct segment-by-segment control of all 64 segments driven by the device. in the no decode mode, the input data directly control the outpu ts as shown in table 6. an input high level turns on the respective segment, except for the decimal point, which is turned on by an input low level on id7. the no decode mode can be used in different applications such as bar graph or status panel driving where each segment controls an individual led. the icm7228c has only the hexadecimal and code b character sets. the hexa/code b/shutdown input, pin 9, requires a three level input. pin 9 selects the hexadecimal format when pulled high, the code b format when floating or driven to mid-supply, and the shutdown mode when pulled low (see table 3). table 5 also applies to the icm7228c. shutdown and display banking when shutdown, the icm7228 enters a low power standby mode typically consuming only 1 ? a of supply current for the icm7228a/b and 2.5 ? a for the icm7228c. in this mode the icm7228 turns off the multiplex scan oscillator as well as the digit and segment drivers. however, input data can still be entered when in the shutdown mode. data is retained in memory even with the supply voltage as low as 2v. the icm7228a/b is shutdown by writing a control word with shutdown (ld4) low. the icm7228c is put into shutdown mode by driving pin 9, hexa/code b/shutdown , low. table 5. display character sets input data code display characters id3 id2 id1 id0 hexadecimal code b 0000 0 0 0001 1 1 0010 2 2 0011 3 3 0100 4 4 0101 5 5 0110 6 6 0111 7 7 1000 8 8 1001 9 9 1010 a - 1011 b e 1100 c h 1101 d l 1110 e p 1111 f (blank) table 5. display character sets (continued) input data code display characters id3 id2 id1 id0 hexadecimal code b i/o or memory write pulse decoder enable address decoder id0 - id3 intersil icm7228c segments drive write da0 - da2 digits drive a0 - a2 device select and write pulse led display address bus a0 - a15 a3 - a15 data bus d0 - d7 microprocessor system and id7 5 figure 10. icm7228c microprocessor system interfacing table 6. no decode segment locations data input id7 id6 id5 id4 id3 id2 id1 id0 controlled segment decimal point abceg f d a b c d f g e dp figure 11. digits segment assignments
icm7228 fn3160 rev 9.00 page 14 of 19 august 19, 2015 the icm7228 operating current with the display blanked is within 100 ? a - 200 ? a for all versions. all versions of the icm7228 can be blanked by writing hex ff to all digits and selecting code b format. the icm7228a and icm7228b can also be blanked by selecting no decode mode and writing hex 80 to all digits (see tables 5and 6). common anode display drivers, icm7228a and icm7228c the common anode digit and segment driver output schematics are shown in figure 12. the common anode digit driver output impedance is approximately 4 ? . this provides a nearly constant voltage to the display digits. each digit has a minimum of 200ma drive capability. the n-channel segment driver?s output impedance of 50 ? limits the segment current to approximately 25ma peak current per segment. both the segment and digit outputs can directly drive the di splay, current limiting resistors are not required. individual segment current is not significantly affe cted by whether other segments are on or off. th is is because the segment driver output impedance is much higher th an that of the digit driver. this feature is important in bar gr aph applications where each bar graph element should have the sa me brightness, independent of the number of elements being turned on. common cathode display driver, icm7228b the common cathode digit and segment driver output schematics are shown in figure 13 . the n-channel digit drivers have an output impedanc e of approximately 15 ? . each digit has a minimum of 50ma drive capability. the segment drivers have an output impedance of approximately 100 ? with typically 10ma peak current drive for each segment. the common cathode display driver output currents are only 1 / 4 of the common anode display driver currents. therefore, the icm7228a and icm7228c common anode display drivers are recommended for those applications where high display brightness is desired. the icm7228b common cathode display driver is suitable for drivi ng bubble-lensed monolithic 7 segment displays. they can also drive individual led displays up to 0.3 inches in height when high brightness is not required. display multiplexing each digit of the icm7228 is on for approximately 320 ? s, with a multiplexing frequency of approximately 390hz. the icm7228 display drivers provide interdigit blanking. this ensures that the segment informati on of the previous digit is gone and the information of the next digit is stable before the next digit is driven on. this is necessary to eliminate display ghosting (a faint display of data from previous digit superimposed on the next digit). the interdigit blanking time is 10 ? s typical with a guaranteed 2 ? s minimum. the icm7228 turns off both the digit drivers and the segment drivers during the interdigit blanking period. the digit multiplexing sequence is: d2, d5, d1, d7, d8, d6, d4 and d3. a typical digit?s drive pulses are shown on figure 4. due to the display multiplexing, the driving duty cycle for each digit is 12% (100 x 1 / 8 ) this means the average current for each segment is 1 / 8 of its peak current. this must be considered while designing and selecting the displays. driving larger displays if very high display brightness is desired, the icm7228 display driver outputs can be externally buffered. figures 14 thru 16 show how to drive either common anode or common cathode displays using the icm7228 and external driver circuit for higher current displays. another method of increasing display currents is to connect two digit outputs together and load the same data into both digits. this drives the display with the same peak current, but the average current doubles because each digit of the display is on for twice as long, i.e., 1 / 4 duty cycle versus 1 / 8 . digit strobe interdigit blanking shutdown v dd ? 200ma common anode digit output ? 2k ? n v ss p ? 2k ? n v ss n n note: when shutdown goes low interdigit blanking also stays low. figure 12a. digit driver segment data interdigit blanking shutdown v dd common anode segment output ? 2k ? v ss n p ? 75 ? figure 12b. segment driver figure 12. common anode display drivers
icm7228 fn3160 rev 9.00 page 15 of 19 august 19, 2015 digit strobe interdigit blanking shutdown v dd common cathode digit output ? 2k ? v ss n p ? 15 ? figure 13a. digit driver segment data interdigit blanking shutdown v dd ? 200ma common cathode segment output ? 2k ? n v ss p ? 2k ? n v ss n 100 ? note: when shutdown goes low interdigit blanking also stays low. figure 13b. segment driver figure 13. common cathode display drivers v dd icm7228a/c segment output digit output v ss up to 10k v dd v ss v dd v dd 4a figure 14. driving high current display, common anode icm7228a/c to common anode v dd icm7228b 100 ? segment output digit output n v ss ? 15 ? 2n6034 14 ?? (100ma peak ) 2n2219 v ss v dd 1.4a peak 14ma v dd figure 15. driving high current display, common cathode icm7228b to common cathode display v dd icm7228b 100 ? segment output 300 ? digit output n v ss ? 15 ? 1k 2n2219 (100ma peak ) 25 ? 2n6034 1.4a peak 1k v dd v ss 1k v dd v dd figure 16. driving high current display, common cathode icm7228b to common anode display
icm7228 fn3160 rev 9.00 page 16 of 19 august 19, 2015 three level input, icm7228c as mentioned before, pin 9 is a three level input and controls three functions: hexadecimal display decoding, code b display decoding and shutdown mode. in many applications, pin 9 will be left open or permanently wired to one state. when pin 9 can not be permanently left in one state, the circuits illustrated in figure 17 can be used to drive this three level input. power supply bypassing connect a minimum of 47 ? f in parallel with 0.1 ? f capacitors between v dd and v ss of icm7228. these capacitors should be placed in close proximity to the device to reduce the power supply ripple caused by the mu ltiplexed led display drive current pulses. high = hex low = shutdown high = hex or shutdown low = code b high = hex low = shutdown high = hex or shutdown low = code b high = code b low = hex high = shutdown low = code b high = shutdown low = hex high = shutdown low = code b pin 9 pin 9 pin 9 pin 9 pin 9 pin 9 cd4016 cd4066 control cd4069 cd4069 cd4069 1n4148 1n4148 open drain or open collector output 74c126 three-state buffer figure 17. icm7228c pin 9 drive circuits test circuit figure 18. functional test circuit #1 id6 (hexa/code b) id5 (decode) id7 (data coming) write mode id4 (shutdown ) id1 id0 id2 id3 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 d8 d7 d6 d5 d4 d3 d2 d1 f d g a c e b dp common anode display v dd 47 ? f +0.1 ? f v ss 5v + - v dd v ss icm7228a
icm7228 fn3160 rev 9.00 page 17 of 19 august 19, 2015 about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o the web to make sure that you have the latest revision. date revision change august 19, 2015 fn3160.9 updated ordering information table and moved it from page 1 to p age 2. added revision history and about intersil sections. updated pod m28.3 to current revision. changes: added land patt ern
icm7228 fn3160 rev 9.00 page 18 of 19 august 19, 2015 dual-in-line plastic packages (pdip) notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the in ch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?mo series symbol list? in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are m easured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protrusions. mold flash or protrusions shal l not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be perpendic- ular to datum . 7. e b and e c are measured at the lead tips with the leads unconstrained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a1 -a- 0.010 (0.25) c a m bs e28.6 (jedec ms-011-ab issue b) 28 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.250 - 6.35 4 a1 0.015 - 0.39 - 4 a2 0.125 0.195 3.18 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.030 0.070 0.77 1.77 8 c 0.008 0.015 0.204 0.381 - d 1.380 1.565 35.1 39.7 5 d1 0.005 - 0.13 - 5 e 0.600 0.625 15.24 15.87 6 e1 0.485 0.580 12.32 14.73 5 e 0.100 bsc 2.54 bsc - e a 0.600 bsc 15.24 bsc 6 e b - 0.700 - 17.78 7 l 0.115 0.200 2.93 5.08 4 n28 289 rev. 1 12/00
fn3160 rev 9.00 page 19 of 19 august 19, 2015 icm7228 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2002-2015. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. small outline plast ic packages (soic) a index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45o c h 0.25(0.010) b m m (1.50mm) (9.38mm) (1.27mm typ) (0.51mm typ) typical recommended land pattern m28.3 (jedec ms-013-ae issue c ) 28 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.0200 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.6969 0.7125 17.70 18.10 3 e 0.2914 0.2992 7.40 7.60 4 e 0.05 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.01 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n28 287 ? 0 o 8 o 0 o 8 o - rev. 1, 1/13 notes: 1. symbols are defined in the mo series symbol list in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension d does not include mold flash, protrusions or gat e burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm ( 0.006 inch) per side. 4. dimension e does not include interlead flash or protrusions . interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. l is the length of terminal for soldering to a substrate. 7. n is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width b, as measured 0.36mm (0.014 inch) or greate r above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimete r. converted inch dimensions are not necessarily exact .

▲Up To Search▲

Price & Availability of ICM7228CIBI

	To Download ICM7228CIBI Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .